Advancement in the integrated circuit technology has lead to vast improvements in the speeds of integrated circuits, i.e., the time in which the output of a circuit reacts in response to a new input. Increasing integrated circuit speed has resulted in faster rise and fall times of the output voltages. Similarly, the fast rise and fall times of the output voltages have resulted in abrupt transitions of output current.
While faster speeds are very desirable, the abrupt transition of output currents create serious problems. The package holding the integrated circuit includes metallic leads which allow interconnection of integrated circuit devices on a circuit board. Each lead has a small inductance associated with it. The leads are connected to the integrated circuits using bonding wire, which also has an inductance associated with it. Voltage is related to inductance and the time rate of change of current by the equation EQU E=L.multidot.di/dt,
where L is the measure of inductance, and di/dt is the change in current with respect to time. The abrupt transition of output current creates a large change of current at the ground and power supply leads and in the bonding wire, resulting ground and power supply voltage spikes. These voltage spikes affect the voltages of the devices, and cause output ringing, ground bounce, and false signals.
The drive capability of output circuits is measured by the DC output current which can be sourced or sunk by the output at specific voltages. The circuit must meet this current under worst case conditions which are usually low supply voltage, high temperature, weak device models. A problem with standard circuit designs is that the output must also not generate too large a di/dt under best case conditions, which are high supply voltage, low temperature, strong device models. The result is that with very fast technologies the output di/dt must be adjusted carefully under best case conditions to minimize voltage shift while output speed is characterized under worst case conditions and the product speed will be judged by the worst case numbers. The difference between these is typically a factor of four in timing. The amount of current which MOS circuits can conduct is limited by the di/dt characteristic and reduces the applications where MOS can be used. As technologies get faster, the ability to get signals off the chip and onto the circuit board with as much speed as possible will be even more important, but the rated speed cannot be as fast as the package will allow due to the shift in performance experienced by the devices used to drive the output where the voltage and temperature are at extremes.
To some extent, the problem may be alleviated by reducing the inductance (L) present at the leads, for example, by providing multiple power supply and ground leads. However, the reduction in inductance is often insufficient to eliminate voltage spikes at the output of many devices, and may necessitate using a large package carry the same integrated circuit.
Another solution attempts to reduce the effect of the voltage spikes by providing a plurality of output transistors which are turned on sequentially such that the circuit provides a plurality of smaller current spikes rather than one large current spike. However, by increasing the number output transistors, the layout of the circuit is much more difficult.
From the foregoing, it may be seen that a need has arisen for a technique which produces an output transistor having a constant change of output current with respect to time in response to switching output voltage states.